Usually, in order to be able to decrease the electric power consumption of an integrated circuit, for example in idle mode, various known electronic means exist. One could envisage, for example, cutting off the integrated circuit supply voltage. In this power down mode, the state of functions integrated in said integrated circuit is not longer guaranteed, which means that the output terminals lose their configuration. Certain specific precautions must therefore be taken from outside the integrated circuit to take care of any problems of incompatibility between the terminals. This may require the addition of a pull up element or pull down element.
JP Patent No. 2003-295988 discloses an integrated circuit fitted with means for reducing the electric power consumption of said integrated circuit in idle mode. In order to do this, the integrated circuit includes at least one voltage level shift unit, which is powered by a regulated internal voltage, and by a high supply voltage of the integrated circuit. The integrated circuit also includes a memory cell, between the voltage level shift unit and an external contact pad. Thus, the configuration of an output terminal is maintained in low-power mode by said memory cell.
In order to store the state of an output terminal of the integrated circuit in JP Patent No. 2003-295988, the integrated circuit software works in two steps. A first step is firstly to store the state of the output terminal in the memory cell, and a second step is to pass into low-power mode leaving the parts powered by the regulated internal voltage, which is disconnected, in a floating state. However, the proposed integrated circuit can only be applied to storing the state of a single output terminal. In the case of configuration backup for the output of several terminals relating to several specific functions, the integrated circuit would have to have several additional operating units. The addition of these operating units complicates the design of the integrated circuit, since good logic levels must be guaranteed in the integrated circuit for the passage from idle mode to normal operating mode.
In the U.S. Pat. No. 6,882,200, it is described an integrated circuit, which includes means for saving terminal state in output of the integrated circuit in an idle mode. In order to do this, it includes a logic circuit to provide control signals, which is powered by a regulated voltage, a voltage level shifter powered by a supply voltage of the integrated circuit, which is connected to the logic circuit to shift in voltage the state of control signals. The voltage level shifter is connected at output to two memory cells to store the state of two outputs of the voltage level shifter in an idle mode where the regulated voltage is cut off. The memory cells are connected to an output stage, which is connected to an external connection pad of the integrated circuit. However this document does not describe the possibility to save the output state of specific functions of several voltage level shifters.